scsi: hisi_sas: unmask interrupts ent72 and ent74

The interrupts of ent72 and ent74 are not processed by PCIe AER handling,
so we need to unmask the interrupts and process them first in the driver.

Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com>
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Gbp-Pq: Topic bugfix/arm64/huawei-taishan
Gbp-Pq: Name 0005-scsi-hisi_sas-unmask-interrupts-ent72-and-ent74.patch

diff --git a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
index fb2a5969181b5edba9d98e589a78459e0839da96..06824bde9c8df66e2853154d1268253ff2990a38 100644 (file)
--- a/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
@@ -441,7 +441,7 @@ static void init_reg_v3_hw(struct hisi_hba *hisi_hba)
        hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK1, 0xfefefefe);
        hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK2, 0xfefefefe);
        if (pdev->revision >= 0x21)
-               hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK3, 0xffff7fff);
+               hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK3, 0xffff7aff);
        else
                hisi_sas_write32(hisi_hba, ENT_INT_SRC_MSK3, 0xfffe20ff);
        hisi_sas_write32(hisi_hba, CHNL_PHYUPDOWN_INT_MSK, 0x0);